Help with multiplexer in verilog?

I am trying to implement a 2-1 multiplexer on my FPGA development board. So far I'm puzzled as to why what I have tried has not worked. I have checked all my pin assignments and they are correct.

My inputs A, B and Sel are connected to switches and output Z connected to an LED. All that happens when I configure the FPGA is that the LED lights up and nothing happens when I switch my inputs.

module multiplexer(input A, B, Sel,
 output reg Z);
 
always@(*)begin
case(Sel)
1'b0: Z = A;
1'b1: Z = B;
default: Z = 1'b0;
endcase
end
endmodule


module multiplexer(input A, B, Sel,
 output Z);
 
assign Z = (~Sel & A) | ( Sel & A);
endmodule

module multiplexer(input A, B, Sel,
output Z);

assign Z = Sel? B:A;
endmodule

module multiplexer(input A, B, Sel,
 output reg Z);

always@(*)begin
if(!Sel)
Z = A;
else if(Sel)
Z = B;
else
Z = 1'b0;
end
endmodule